Design and Board page

anonymous@undisclosed.example.com (Anonymous) — Tue, 01 Sep 2020 08:59:14 +0000

2026/05/02 03:31	current
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	+	====== Design and Board page ======
	+	On this page you can find my design which I use (used).
	+
	+	Boards list
	+	<!-- please do not add your own stars -->
	+	* [[boards:ml401:ml401\|Xilinx ml401]] [stars=4/5]
	+	* [[boards:ml310:ml310\|Xilinx ml310]] [stars=1/5]
	+	* [[boards:ml505:ml505\|Xilinx ml505]] [stars=5/5]
	+	* [[boards:xupv2p:xupv2p\|Xilinx XUPV2P]] [stars=2/5]
	+	* [[boards:s3e500:s3e500\|Xilinx s3e500]] [stars=2/5]
	+	* [[boards:s3e1600:s3e1600\|Xilinx s3e1600]] [stars=4/5]
	+	* [[boards:s3adsp1800:s3adsp1800\|Xilinx s3adsp1800]] [stars=3/5]
	+	* [[boards:sp605:sp605\|Xilinx sp605]] [stars=4/5]
	+	* [[boards:rc203:rc203\|Celoxica rc203]] [stars=0/5]
	+	* [[boards:morphologix:MPL3E\|Morphologic MPL3E Evaluation board]] [stars=4/5]
	+	* [[http://www.digilentinc.com/Products/Detail.cfm?NavPath=2,648,467&Prod=EVB-USB3300-XLX\| Usb daugher card for ml50x boards]] [stars=5/5]
	+	* [[http://www.silica.com/products/highlight/product/xilinx-spartan-6-lx9-microboard.html\|Xilinx Spartan-6 LX9 MicroBoard]] [[http://www.silica.com/fileadmin/02_Products/Productdetails/Xilinx/Spartan-6-lx9-microboard_pb.pdf\|pdf]]
	+
	+	* [[http://www.xilinx.com/products/silicon_solutions/fpgas/index.htm\|FPGA Technology website]]
	+
	+
	+	HW descriptions
	+
	+	\|System ACE\| ftp://ftp.xilinx.com/pub/documentation/misc/system_ace.pdf\|
	+	\| \| http://www.xilinx.com/itp/xilinx4/data/docs/pac/appendixc9.html - impact scripts\|
	+	\|USB\| http://www.accesscomms.com.au/reference/usb.htm\|
	+	\|Ethernet \| http://en.wikipedia.org/wiki/Ethernet_crossover_cable\|
	+	\| \| http://openvpn.net/index.php/open-source/documentation/miscellaneous/76-ethernet-bridging.html\|
	+	\| SMSC phy\| [[http://www.smsc.com/index.php?tid=183&pid=&cid=&tab=\|SMSC phy]]\|
	+	\| CAN \| http://www.softing.com/home/en/industrial-automation/products/can-bus/more-can-bus/high-speed/cia-ds-102-pin-assignment.php\|
	+	\| rs232 \| http://en.wikipedia.org/wiki/RS-232\|
	+	\|Compact flash\|http://www.compactflash.org/\|
	+	\|rs232-usb\|http://www.ftdichip.com/Products/FT232BM.htm\|
	+
	+	Nullmodem Cable
	+
	+	{{design:nullmodem.jpg\|Nullmodem Cable}}
	+
	+	Flying wires - USB Jtag
	+
	+	{{:design:hw-flyleads.jpg\|Flying wires}}
	+
	+
	+	Xilinx USB-PC cable
	+
	+	{{:design:image91515.jpg\|http://www.xilinx.com/products/devkits/HW-USB-G-image.htm}}
	+
	+	[[http://cs.wikipedia.org/wiki/RJ-45\| RJ-45]]
	+
	+	{{:design:rj45plug-8p8c.png\|}}
	+
	+
	+	Male SUB-9 - http://hw.cz/rs-232#konektory
	+
	+	{{:design:10gc-d1.jpg\|}}
	+
	+
	+	===== ATX power supply =====
	+
	+	http://hw.cz/Teorie-a-praxe/Dokumentace/ART379-Vyuziti-PC-ATX-zdroje-pro-napajeni-zarizeni.html
	+
	+	Turn on: Connect PS_ON# and GNG (Some power supplies needs minimal load)
	+
	+	{{:design:pc_atx_power_conectors.gif\|}}
	+	{{:design:dscn9489.jpg?200\|}}
	+	{{:design:dscn9491.jpg?200\|}}
	+
	+	++++ czech \|
	+
	+	Tento pulsní zdroj ač má malé rozměry, dokáže dodat velký proud. Malé rozměry zdroje jsou dány absenci síťového transformátoru. Pulsní zdroj usměrňuje přímo síťové napětí. Obecně se počítačové ATX zdroje liší podle výstupního výkonu(W).
	+	Jejich výstupní výkon se pohybuje od 200W do 400W.
	+	12Voltová větev dokáže dodat spotřebiči 8 Ampér a 5 Voltová větev je schopna dodávat až 20 Ampér. Zdroj má ještě -12 Voltů i -5 Voltů a jejich výstupní proud je 1 Ampér. Výstupní napětí je velmi dobře filtrováno.
	+	Zdroj ATX musíme zapínat vždy pod zátěží , jinak ho bohužel nenastartujeme. Pulsní zdroje vyhodnocují odběr na výstupu. Kdyby tam tato ochrana nebyla, mohl by se poškodit. Pokud ho chceme vyzkoušet mimo počítač, musíme zatížit obě větve. 12V větev proti mínusu a 5V větev také proti mínusu. Jako zátěž nám může posloužit žárovka nebo větší odpor. Jestliže máme ke zdroji připojenu zátěž, stačí ho jen nastartovat.
	+	Startuje se krátkým spojením zeleného drátu proti zemi ( černý vodič) . Jestliže ho chcete vypnout, opět spojíte zelený drát proti zemi zhruba na 5 sekund. Takto to bylo u zdrojů, které jsem opravoval. V komentářích, ale čtenáři píší, že zdroj zapínají trvalým spojením a vypínají rozpojením výše uvedených vodičů.
	+
	+
	+
	+	=== Barvy vodičů ===
	+
	+
	+	^Barva ^Popis^
	+	\|Oranžová \|+3,3V=\|
	+	\|Bílá \|-5V=\|
	+	\|Červená \|+5 V=\|
	+	\|Žlutá \|+12 V=\|
	+	\|Modrá \|-12 V=\|
	+	\|Černá \|Zem\|
	+	\|Černá \|Zem\|
	+	\|Zelená \|Zapnutí,vypnutí zdroje.\|
	+	\|Fialová \|+5V pro board\|
	+
	+
	+	=== Závěr ===
	+
	+	Závěrem bych chtěl poznamenat, že tyto zdroje se moc nehodí pro napájení nízkofrekvenční a vysokofrekvenční techniky. Jestliže je chcete přesto použít, musíte celé zařízení dokonale odstínit. Například zavřít do plechových, vzájemně pospojovaných krabiček. Stíněné kablíky v konstrukcích jsou také samozřejmostí.
	+
	+	++++
	+
	+	===== EDK and ISE from Windows =====
	+
	+	++++ ise92.bat\|
	+	set XILINX=f:\xilinx\ise92i
	+	set XILINX_EDK=f:\xilinx\edk92i
	+
	+	set PATH=%XILINX%\bin\nt;%XILINX_EDK%\bin\nt;%PATH%
	+
	+	%XILINX%\bin\nt\ise.exe
	+	++++
	+	++++ edk92.bat - window mode \|
	+	set XILINX=f:\xilinx\ise92i
	+	set XILINX_EDK=f:\xilinx\edk92i
	+
	+	set PATH=%XILINX%\bin\nt;%XILINX_EDK%\bin\nt;%PATH%
	+
	+	%XILINX_EDK%\bin\nt\xps.exe
	+	++++
	+	++++ edk92nw.bat - EDK no window mode \|
	+	set XILINX=f:\xilinx\ise92i
	+	set XILINX_EDK=f:\xilinx\edk92i
	+
	+	set PATH=%XILINX%\bin\nt;%XILINX_EDK%\bin\nt;%PATH%
	+
	+	%XILINX_EDK%\bin\nt\xps.exe
	+	++++
	+	++++ shell92.bat \|
	+	set XILINX=f:\xilinx\ise92i
	+	set XILINX_EDK=f:\xilinx\edk92i
	+
	+	set PATH=%XILINX%\bin\nt;%XILINX_EDK%\bin\nt;%PATH%
	+
	+	%XILINX_EDK%\bin\nt\xbash.exe
	+	++++
	+
	+	===== Cleaning project =====
	+	++++ Run in folder where are stored EDK project \|
	+
	+	#!/bin/bash
	+
	+	# Cleaning EDK script v1.00.a
	+	#
	+	# Copyright C - 2008 All rights reserved. Michal Simek
	+	#
	+	# No part of this program may be reproduced or adapted in any form
	+	# or by any means, electronic or mechanical, without permission from
	+	# Michal Simek. This program is confidential and may not be disclosed,
	+	# decompiled or reverse engineered without permission in writing from
	+	# Michal Simek
	+
	+	#
	+	# make -f system.make clean
	+	#
	+	addr=`find * -name "system.make"`
	+
	+	for i in $addr
	+	do
	+	echo $i
	+	addr=`echo $i \| sed s/system.make//g`
	+	make -C $addr -f "system.make" clean
	+	done
	+
	+	#
	+	#remove files with extension
	+	#
	+	files=".svf .bin"
	+
	+	for i in $files
	+	do
	+	find * -name "$i" -type f \| xargs rm -f
	+	echo "$i"
	+
	+	done
	+
	+	#
	+	#remove directories
	+	#
	+	files="
	+	microblaze_?
	+	ppc405_?
	+	implementation
	+	synthesis
	+	hdl
	+	report
	+	blkdiagram
	+	__xps
	+	"
	+
	+	for i in $files
	+	do
	+	find * -name "$i" -type d -maxdepth 1 \| xargs rm -rf
	+	echo "$i depth 1"
	+
	+	done
	+
	+	#
	+	#remove empty dir
	+	#
	+	find * -type d -empty \| xargs rm -rf
	+	++++
	+
	+	===== How to manage projects in git? =====
	+
	+	On this page is only copy from http://wiki.secretlab.ca/index.php/Revision_control_for_Xilinx_EDK_projects
	+
	+	There seems to be very little documentation from Xilinx on how to use SCM (Source Code Management) tools to manage EDK projects. It's easy enough to throw a whole project, generated files and all, into a repository for maintaining project history, but doing so isn't so useful when trying to determine what exactly changed between two versions of the code. It results in wading through a large changeset where most of the diffs are in generated files, when all that you're interested in is explicit source code changes.
	+
	+	I've found the git tool to be a particularly useful SCM tool, and as such these notes are geared to managing an EDK tree with git. The suggestions here can easily be adapted to other SCM tools.
	+
	+	==== Moving between Windows and Linux/Solaris ====
	+
	+	Line endings on text files are different between Windows and Linux/Solaris. Text files created by Windows use "CRLF" line endings, whereas other systems simply use the "LF" character. If you are moving a project back and forth between Windows and Linux, you should scrub line ending differences before committing your changes. I use the following script on Linux to change to UNIX style line endings on all text source files.
	+
	+	edk-sanitize.sh:
	+
	+	#!/bin/sh
	+	find * -type d \| xargs chmod u+w
	+	git-ls-files \| xargs chmod u+w
	+	git-ls-files '.opt' '.mhs' '.mss' '.xmp' '*.arg' \| xargs dos2unix
	+	git-ls-files '.make' '.cmd' '.ld' '.c' '.h' '*.prj' \| xargs dos2unix
	+	git-ls-files '.mpd' '.pao' '.cli' '.txt' '.ucf' '.lfp' \| xargs dos2unix
	+	git-ls-files '.ref' '.vhd' '.ant' '.jhd' '.tbw' '.vhw' \| xargs dos2unix
	+	git-ls-files '.lso' 'transcript' '.fdo' '.udo' '*.xst' \| xargs dos2unix
	+	git-ls-files '_info' '.cdc' \| xargs dos2unix
	+
	+
	+	=== Getting started ===
	+
	+	Use the following commands to setup your git repository for an EDK project and checking your initial project.
	+
	+	$ cd /path/to/edk/project/dir
	+	$ git-init
	+	$ vim .gitignore # Add the patterns listed in the "Controlled file list" section.
	+	$ git add .gitignore
	+	$ git commit -m "Add .gitignore file"
	+	$ git add .
	+	$ edk-sanitize.sh # Make CR/CRLF line endings consistent
	+	$ git commit -a -m "Initial EDK commit"
	+
	+
	+	=== Controlled file list ===
	+
	+	We only want to control files that are not generated by the build system. Use the following .gitignore file to ignore generated files. It's a list of patterns, any file that matches the pattern is ignored by git.
	+
	+	ppc405_?
	+	microblaze_?
	+	implementation
	+	synthesis
	+	hdl
	+	report
	+	blkdiagram
	+	fs-boot
	+	__xps
	+	*.log
	+	*.svf
	+	*.scr
	+	*.cmd
	+	*.bak
	+	*~
	+	*.elf
	+	*.ace
	+
	+	=== Notes ===
	+
	+	* Always use 'git diff HEAD' before committing changes. Make sure the diff doesn't contain anything you don't expect.
	+	* Chipscope files (*.cdc) are in the implementation directory. They should probably be retained, but they are excluded by the above list.
	+	* However, "Project"->"Clean All Generated Files" deletes the entire implementation/ directory, so if you want to keep the *.cdc files, archive them in a different subdirectory.
	+	* Platform Studio seems to be hard coded to generate system.make and system_incl.make. If you want to make custom changes to the make files, make sure you rename them in the project first. ("Project"->"Project Options"->"Custom Makefile").
	+
	+
	+
	+	====== EDK ======
	+
	+
	+	===== Errors =====
	+	==== Selected two application ====
	+
	+	You have selected two and more application to same memory space. (green icon in EDK installation)
	+	Analyzing file bootloops/microblaze_0.elf...
	+	ERROR:MDT - Memory overlap detected between various program headers for
	+	processor microblaze_0
	+
	+	==== Full MMU and PVR - Microblaze 7.00.a/b ====
	+
	+
	+	Microblaze v7.00.a and v7.00.b have problem with TURN on MMU full and function of PVR registers
	+
	+	MicroBlaze Processor Configuration :
	+	-------------------------------------
	+	Version............................7.00.a
	+	Optimization.......................Performance
	+	Interconnect.......................PLBv46
	+	MMU Type...........................Full_MMU
	+	No of PC Breakpoints...............2
	+	No of Read Addr/Data Watchpoints...0
	+	No of Write Addr/Data Watchpoints..0
	+	Instruction Cache Support..........on
	+	Instruction Cache Base Address.....0x20000000
	+	Instruction Cache High Address.....0x21ffffff
	+	Data Cache Support.................on
	+	Data Cache Base Address............0x20000000
	+	Data Cache High Address............0x21ffffff
	+	Exceptions Support................on
	+	FPU Support.......................on
	+	Hard Divider Support...............on
	+	Hard Multiplier Support............on - (Mul64)
	+	Barrel Shifter Support.............on
	+	MSR clr/set Instruction Support....on
	+	Compare Instruction Support........on
	+	Number of FSL ports................1
	+	PVR Supported......................on
	+	PVR Configuration Type.............Full
	+
	+	Connected to MDM UART Target
	+	Connected to "mb" target. id = 0
	+	Starting GDB server for "mb" target (id = 0) at TCP port no 1234
	+	XMD% srrd
	+	pc: 20002530 msr: 000005a2 ear: 00000000 esr: 00000000
	+	fsr: 00000000 btr: 2000252c pvr0: 80000012 pvr1: 00000038
	+	pvr2: 00000033 pvr3: 80000000 pvr4: 80000000 pvr5: 80000000
	+	pvr6: 00000000 pvr7: 0000003f pvr8: 00000000 pvr9: 0000003f
	+	pvr10: 00000000 pvr11: 80000000
	+
	+	MicroBlaze Processor Configuration :
	+	-------------------------------------
	+	Version............................7.00.b
	+	Optimization.......................Performance
	+	Interconnect.......................PLBv46
	+	MMU Type...........................Full_MMU
	+	No of PC Breakpoints...............2
	+	No of Read Addr/Data Watchpoints...0
	+	No of Write Addr/Data Watchpoints..0
	+	Instruction Cache Support..........on
	+	Instruction Cache Base Address.....0x20000000
	+	Instruction Cache High Address.....0x21ffffff
	+	Data Cache Support.................on
	+	Data Cache Base Address............0x20000000
	+	Data Cache High Address............0x21ffffff
	+	Exceptions Support................on
	+	FPU Support.......................on
	+	Hard Divider Support...............on
	+	Hard Multiplier Support............on - (Mul64)
	+	Barrel Shifter Support.............on
	+	MSR clr/set Instruction Support....on
	+	Compare Instruction Support........on
	+	Number of FSL ports................1
	+	PVR Supported......................on
	+	PVR Configuration Type.............Full
	+
	+	Connected to MDM UART Target
	+	Connected to "mb" target. id = 0
	+	Starting GDB server for "mb" target (id = 0) at TCP port no 1234
	+	XMD% srrd
	+	pc: 21a06880 msr: 000004a2 ear: 00000000 esr: 00000000
	+	fsr: 00000000 btr: 00000000 pvr0: 80000012 pvr1: 00000038
	+	pvr2: 00000033 pvr3: 80000000 pvr4: 80000000 pvr5: 80000000
	+	pvr6: 00000000 pvr7: 0000003f pvr8: 00000000 pvr9: 0000003f
	+	pvr10: 00000000 pvr11: 80000000
	+

Microblaze Linux/Qemu/U-Boot wiki - design

Design and Board page